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https://github.com/licsber/micropython.git
synced 2024-09-20 17:10:24 +08:00
e202b6f586
There is a minor functional change with this patch, that the GPIO are now configured in fast mode, whereas they were in high speed mode before. But the SDIO should still work because SD CK frequency is at most 25MHz.
600 B
600 B
| 1 | A0 | PA0 |
|---|---|---|
| 2 | A1 | PF10 |
| 3 | A2 | PF9 |
| 4 | A3 | PF8 |
| 5 | A4 | PF7 |
| 6 | A5 | PF6 |
| 7 | D0 | PC7 |
| 8 | D1 | PC6 |
| 9 | D2 | PG6 |
| 10 | D3 | PB4 |
| 11 | D4 | PG7 |
| 12 | D5 | PA8 |
| 13 | D6 | PH6 |
| 14 | D7 | PI3 |
| 15 | D8 | PI2 |
| 16 | D9 | PA15 |
| 17 | D10 | PI0 |
| 18 | D11 | PB15 |
| 19 | D12 | PB14 |
| 20 | D13 | PI1 |
| 21 | D14 | PB9 |
| 22 | D15 | PB8 |
| 23 | LED1 | PJ13 |
| 24 | LED2 | PJ5 |
| 25 | LED3 | PA12 |
| 26 | SW | PI11 |
| 27 | TP1 | PH2 |
| 28 | TP2 | PI8 |
| 29 | TP3 | PH15 |
| 30 | AUDIO_INT | PD6 |
| 31 | AUDIO_SDA | PH8 |
| 32 | AUDIO_SCL | PH7 |
| 33 | EXT_SDA | PB9 |
| 34 | EXT_SCL | PB8 |
| 35 | EXT_RST | PG3 |
| 36 | SD_D0 | PC8 |
| 37 | SD_D1 | PC9 |
| 38 | SD_D2 | PC10 |
| 39 | SD_D3 | PC11 |
| 40 | SD_CK | PC12 |
| 41 | SD_CMD | PD2 |
| 42 | SD_SW | PI15 |
| 43 | LCD_BL_CTRL | PK3 |
| 44 | LCD_INT | PI13 |
| 45 | LCD_SDA | PH8 |
| 46 | LCD_SCL | PH7 |
| 47 | OTG_FS_POWER | PD5 |
| 48 | OTG_FS_OVER_CURRENT | PD4 |
| 49 | OTG_HS_OVER_CURRENT | PE3 |
| 50 | USB_VBUS | PJ12 |
| 51 | USB_ID | PA8 |
| 52 | USB_DM | PA11 |
| 53 | USB_DP | PA12 |
| 54 | UART1_TX | PA9 |
| 55 | UART1_RX | PA10 |
| 56 | UART5_TX | PC12 |
| 57 | UART5_RX | PD2 |