mirror of
https://github.com/licsber/micropython.git
synced 2024-09-20 17:10:24 +08:00
aa7b32c811
This patch makes the DAC driver simpler and removes the need for the ST HAL. As part of it, new helper functions are added to the DMA driver, which also use direct register access instead of the ST HAL. Main changes to the DAC interface are: - The DAC uPy object is no longer allocated dynamically on the heap, rather it's statically allocated and the same object is retrieved for subsequent uses of pyb.DAC(<id>). This allows to access the DAC objects without resetting the DAC peripheral. It also means that the DAC is only reset if explicitly passed initialisation parameters, like "bits" or "buffering". - The DAC.noise() and DAC.triangle() methods now output a signal which is full scale (previously it was a fraction of the full output voltage). - The DAC.write_timed() method is fixed so that it continues in the background when another peripheral (eg SPI) uses the DMA (previously the DAC would stop if another peripheral finished with the DMA and shut the DMA peripheral off completely). Based on the above, the following backwards incompatibilities are introduced: - pyb.DAC(id) will now only reset the DAC the first time it is called, whereas previously each call to create a DAC object would reset the DAC. To get the old behaviour pass the bits parameter like: pyb.DAC(id, bits). - DAC.noise() and DAC.triangle() are now full scale. To get previous behaviour (to change the amplitude and offset) write to the DAC_CR (MAMP bits) and DAC_DHR12Rx registers manually.
583 lines
16 KiB
Makefile
583 lines
16 KiB
Makefile
# Select the board to build for: if not given on the command line,
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# then default to PYBV10.
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BOARD ?= PYBV10
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# If the build directory is not given, make it reflect the board name.
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BUILD ?= build-$(BOARD)
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BOARD_DIR ?= boards/$(BOARD)
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ifeq ($(wildcard $(BOARD_DIR)/.),)
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$(error Invalid BOARD specified: $(BOARD_DIR))
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endif
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include ../../py/mkenv.mk
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-include mpconfigport.mk
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include $(BOARD_DIR)/mpconfigboard.mk
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# qstr definitions (must come before including py.mk)
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QSTR_DEFS = qstrdefsport.h $(BUILD)/pins_qstr.h $(BUILD)/modstm_qstr.h
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QSTR_GLOBAL_DEPENDENCIES = mpconfigboard_common.h $(BOARD_DIR)/mpconfigboard.h
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# directory containing scripts to be frozen as bytecode
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FROZEN_MPY_DIR ?= modules
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# include py core make definitions
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include $(TOP)/py/py.mk
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LD_DIR=boards
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CMSIS_DIR=$(TOP)/lib/stm32lib/CMSIS/STM32$(MCU_SERIES_UPPER)xx/Include
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MCU_SERIES_UPPER = $(shell echo $(MCU_SERIES) | tr '[:lower:]' '[:upper:]')
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HAL_DIR=lib/stm32lib/STM32$(MCU_SERIES_UPPER)xx_HAL_Driver
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USBDEV_DIR=usbdev
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#USBHOST_DIR=usbhost
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FATFS_DIR=lib/oofatfs
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DFU=$(TOP)/tools/dfu.py
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# may need to prefix dfu-util with sudo
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USE_PYDFU ?= 1
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PYDFU ?= $(TOP)/tools/pydfu.py
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DFU_UTIL ?= dfu-util
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DEVICE=0483:df11
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STFLASH ?= st-flash
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OPENOCD ?= openocd
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OPENOCD_CONFIG ?= boards/openocd_stm32f4.cfg
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STARTUP_FILE ?= boards/startup_stm32$(MCU_SERIES).o
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# Select the cross compile prefix
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CROSS_COMPILE ?= arm-none-eabi-
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INC += -I.
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INC += -I$(TOP)
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INC += -I$(BUILD)
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INC += -I$(TOP)/lib/cmsis/inc
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INC += -I$(CMSIS_DIR)/
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INC += -I$(TOP)/$(HAL_DIR)/Inc
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INC += -I$(USBDEV_DIR)/core/inc -I$(USBDEV_DIR)/class/inc
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#INC += -I$(USBHOST_DIR)
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INC += -Ilwip_inc
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# Basic Cortex-M flags
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CFLAGS_CORTEX_M = -mthumb
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# Select hardware floating-point support
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ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),STM32F765xx STM32F767xx STM32F769xx STM32H743xx))
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CFLAGS_CORTEX_M += -mfpu=fpv5-d16 -mfloat-abi=hard
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else
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ifeq ($(MCU_SERIES),f0)
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CFLAGS_CORTEX_M += -msoft-float
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else
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CFLAGS_CORTEX_M += -mfpu=fpv4-sp-d16 -mfloat-abi=hard
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endif
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endif
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# Options for particular MCU series
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CFLAGS_MCU_f0 = $(CFLAGS_CORTEX_M) -mtune=cortex-m0 -mcpu=cortex-m0
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CFLAGS_MCU_f4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
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CFLAGS_MCU_f7 = $(CFLAGS_CORTEX_M) -mtune=cortex-m7 -mcpu=cortex-m7
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CFLAGS_MCU_l4 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
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CFLAGS_MCU_h7 = $(CFLAGS_CORTEX_M) -mtune=cortex-m7 -mcpu=cortex-m7
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CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -std=gnu99 -nostdlib $(CFLAGS_MOD) $(CFLAGS_EXTRA)
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CFLAGS += -D$(CMSIS_MCU)
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CFLAGS += $(CFLAGS_MCU_$(MCU_SERIES))
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CFLAGS += $(COPT)
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CFLAGS += -I$(BOARD_DIR)
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CFLAGS += -DSTM32_HAL_H='<stm32$(MCU_SERIES)xx_hal.h>'
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CFLAGS += -DMICROPY_HW_VTOR=$(TEXT0_ADDR)
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ifeq ($(MICROPY_FLOAT_IMPL),double)
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CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_DOUBLE
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else
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CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_FLOAT
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CFLAGS += -fsingle-precision-constant -Wdouble-promotion
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endif
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LDFLAGS = -nostdlib -L $(LD_DIR) $(addprefix -T,$(LD_FILES)) -Map=$(@:.elf=.map) --cref
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LIBS = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
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# Remove uncalled code from the final image.
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CFLAGS += -fdata-sections -ffunction-sections
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LDFLAGS += --gc-sections
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# Debugging/Optimization
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ifeq ($(DEBUG), 1)
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CFLAGS += -g -DPENDSV_DEBUG
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COPT = -O0
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else
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COPT += -Os -DNDEBUG
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endif
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# Options for mpy-cross
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MPY_CROSS_FLAGS += -march=armv7m
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SRC_LIB = $(addprefix lib/,\
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libc/string0.c \
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oofatfs/ff.c \
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oofatfs/ffunicode.c \
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mp-readline/readline.c \
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netutils/netutils.c \
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netutils/trace.c \
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timeutils/timeutils.c \
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utils/pyexec.c \
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utils/interrupt_char.c \
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utils/sys_stdio_mphal.c \
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utils/mpirq.c \
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)
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ifeq ($(MICROPY_FLOAT_IMPL),double)
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SRC_LIBM = $(addprefix lib/libm_dbl/,\
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__cos.c \
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__expo2.c \
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__fpclassify.c \
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__rem_pio2.c \
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__rem_pio2_large.c \
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__signbit.c \
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__sin.c \
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__tan.c \
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acos.c \
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acosh.c \
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asin.c \
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asinh.c \
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atan.c \
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atan2.c \
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atanh.c \
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ceil.c \
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cos.c \
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cosh.c \
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copysign.c \
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erf.c \
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exp.c \
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expm1.c \
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floor.c \
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fmod.c \
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frexp.c \
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ldexp.c \
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lgamma.c \
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log.c \
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log10.c \
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log1p.c \
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modf.c \
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nearbyint.c \
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pow.c \
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rint.c \
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scalbn.c \
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sin.c \
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sinh.c \
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sqrt.c \
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tan.c \
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tanh.c \
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tgamma.c \
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trunc.c \
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)
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else
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SRC_LIBM = $(addprefix lib/libm/,\
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math.c \
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acoshf.c \
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asinfacosf.c \
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asinhf.c \
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atan2f.c \
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atanf.c \
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atanhf.c \
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ef_rem_pio2.c \
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erf_lgamma.c \
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fmodf.c \
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kf_cos.c \
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kf_rem_pio2.c \
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kf_sin.c \
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kf_tan.c \
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log1pf.c \
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nearbyintf.c \
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sf_cos.c \
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sf_erf.c \
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sf_frexp.c \
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sf_ldexp.c \
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sf_modf.c \
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sf_sin.c \
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sf_tan.c \
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wf_lgamma.c \
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wf_tgamma.c \
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)
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ifeq ($(MCU_SERIES),f0)
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SRC_LIBM += lib/libm/ef_sqrt.c
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else
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SRC_LIBM += lib/libm/thumb_vfp_sqrtf.c
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endif
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endif
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EXTMOD_SRC_C = $(addprefix extmod/,\
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modonewire.c \
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)
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DRIVERS_SRC_C = $(addprefix drivers/,\
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bus/softspi.c \
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bus/softqspi.c \
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memory/spiflash.c \
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dht/dht.c \
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)
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SRC_C = \
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main.c \
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stm32_it.c \
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usbd_conf.c \
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usbd_desc.c \
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usbd_cdc_interface.c \
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usbd_hid_interface.c \
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usbd_msc_storage.c \
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mphalport.c \
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mpthreadport.c \
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irq.c \
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pendsv.c \
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systick.c \
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powerctrl.c \
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pybthread.c \
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timer.c \
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led.c \
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pin.c \
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pin_defs_stm32.c \
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pin_named_pins.c \
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bufhelper.c \
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dma.c \
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i2c.c \
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pyb_i2c.c \
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spi.c \
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pyb_spi.c \
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qspi.c \
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uart.c \
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can.c \
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usb.c \
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wdt.c \
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eth.c \
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gccollect.c \
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help.c \
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machine_i2c.c \
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machine_spi.c \
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machine_uart.c \
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modmachine.c \
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modpyb.c \
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modstm.c \
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moduos.c \
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modutime.c \
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modusocket.c \
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network_lan.c \
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modnetwork.c \
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extint.c \
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usrsw.c \
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rng.c \
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rtc.c \
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flash.c \
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flashbdev.c \
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spibdev.c \
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storage.c \
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sdcard.c \
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sdram.c \
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fatfs_port.c \
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lcd.c \
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accel.c \
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servo.c \
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dac.c \
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adc.c \
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$(wildcard $(BOARD_DIR)/*.c)
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ifeq ($(MCU_SERIES),f0)
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SRC_O = \
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$(STARTUP_FILE) \
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system_stm32f0.o \
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resethandler_m0.o \
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lib/utils/gchelper_m0.o
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else
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SRC_O = \
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$(STARTUP_FILE) \
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system_stm32.o \
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resethandler.o \
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lib/utils/gchelper_m3.o
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endif
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SRC_HAL = $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_,\
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hal.c \
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hal_adc.c \
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hal_adc_ex.c \
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hal_cortex.c \
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hal_dma.c \
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hal_flash.c \
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hal_flash_ex.c \
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hal_gpio.c \
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hal_i2c.c \
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hal_pcd.c \
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hal_pcd_ex.c \
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hal_pwr.c \
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hal_pwr_ex.c \
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hal_rcc.c \
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hal_rcc_ex.c \
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hal_rtc.c \
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hal_rtc_ex.c \
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hal_spi.c \
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hal_tim.c \
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hal_tim_ex.c \
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hal_uart.c \
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)
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ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),f4 f7 h7 l4))
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$(BUILD)/$(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_ll_usb.o: CFLAGS += -Wno-attributes
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SRC_HAL += $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_,\
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hal_sd.c \
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ll_sdmmc.c \
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ll_fmc.c \
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ll_usb.c \
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)
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endif
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ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),f4 f7 h7))
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SRC_HAL += $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_,\
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hal_mmc.c \
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hal_sdram.c \
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hal_dma_ex.c \
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hal_dcmi.c \
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)
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endif
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ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),STM32H743xx))
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SRC_HAL += $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_, hal_fdcan.c)
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else
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SRC_HAL += $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES)xx_, hal_can.c)
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endif
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SRC_USBDEV = $(addprefix $(USBDEV_DIR)/,\
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core/src/usbd_core.c \
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core/src/usbd_ctlreq.c \
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core/src/usbd_ioreq.c \
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class/src/usbd_cdc_msc_hid.c \
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class/src/usbd_msc_bot.c \
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class/src/usbd_msc_scsi.c \
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class/src/usbd_msc_data.c \
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)
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ifneq ($(MICROPY_PY_WIZNET5K),0)
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WIZNET5K_DIR=drivers/wiznet5k
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INC += -I$(TOP)/$(WIZNET5K_DIR)
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CFLAGS_MOD += -DMICROPY_PY_WIZNET5K=$(MICROPY_PY_WIZNET5K) -D_WIZCHIP_=$(MICROPY_PY_WIZNET5K)
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SRC_MOD += network_wiznet5k.c modnwwiznet5k.c
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SRC_MOD += $(addprefix $(WIZNET5K_DIR)/,\
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ethernet/w$(MICROPY_PY_WIZNET5K)/w$(MICROPY_PY_WIZNET5K).c \
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ethernet/wizchip_conf.c \
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ethernet/socket.c \
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internet/dns/dns.c \
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)
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endif
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# for CC3000 module
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ifeq ($(MICROPY_PY_CC3K),1)
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CC3000_DIR=drivers/cc3000
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INC += -I$(TOP)/$(CC3000_DIR)/inc
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CFLAGS_MOD += -DMICROPY_PY_CC3K=1
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SRC_MOD += modnwcc3k.c
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SRC_MOD += $(addprefix $(CC3000_DIR)/src/,\
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cc3000_common.c \
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evnt_handler.c \
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hci.c \
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netapp.c \
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nvmem.c \
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security.c \
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socket.c \
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wlan.c \
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ccspi.c \
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inet_ntop.c \
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inet_pton.c \
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patch.c \
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patch_prog.c \
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)
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endif
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OBJ =
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OBJ += $(PY_O)
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OBJ += $(addprefix $(BUILD)/, $(SRC_LIB:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(EXTMOD_SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_O))
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OBJ += $(addprefix $(BUILD)/, $(SRC_HAL:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_USBDEV:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o))
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OBJ += $(BUILD)/pins_$(BOARD).o
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# This file contains performance critical functions so turn up the optimisation
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# level. It doesn't add much to the code size and improves performance a bit.
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# Don't use -O3 with this file because gcc tries to optimise memset in terms of itself.
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$(BUILD)/lib/libc/string0.o: COPT += -O2
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# We put several files into the first 16K section with the ISRs.
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# If we compile these using -O0 then it won't fit. So if you really want these
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# to be compiled with -O0, then edit boards/common.ld (in the .isr_vector section)
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# and comment out the following lines.
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$(BUILD)/$(FATFS_DIR)/ff.o: COPT += -Os
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$(filter $(PY_BUILD)/../extmod/vfs_fat_%.o, $(PY_O)): COPT += -Os
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|
$(PY_BUILD)/formatfloat.o: COPT += -Os
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|
$(PY_BUILD)/parsenum.o: COPT += -Os
|
|
$(PY_BUILD)/mpprint.o: COPT += -Os
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|
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all: $(TOP)/lib/stm32lib/README.md $(BUILD)/firmware.dfu $(BUILD)/firmware.hex
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|
|
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# For convenience, automatically fetch required submodules if they don't exist
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$(TOP)/lib/stm32lib/README.md:
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$(ECHO) "stm32lib submodule not found, fetching it now..."
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|
(cd $(TOP) && git submodule update --init lib/stm32lib)
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|
|
|
ifneq ($(FROZEN_DIR),)
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|
# To use frozen source modules, put your .py files in a subdirectory (eg scripts/)
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|
# and then invoke make with FROZEN_DIR=scripts (be sure to build from scratch).
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CFLAGS += -DMICROPY_MODULE_FROZEN_STR
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endif
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|
|
|
ifneq ($(FROZEN_MPY_DIR),)
|
|
# To use frozen bytecode, put your .py files in a subdirectory (eg frozen/) and
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|
# then invoke make with FROZEN_MPY_DIR=frozen (be sure to build from scratch).
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CFLAGS += -DMICROPY_QSTR_EXTRA_POOL=mp_qstr_frozen_const_pool
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CFLAGS += -DMICROPY_MODULE_FROZEN_MPY
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endif
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|
.PHONY: deploy
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deploy: $(BUILD)/firmware.dfu
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|
$(ECHO) "Writing $< to the board"
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|
ifeq ($(USE_PYDFU),1)
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$(Q)$(PYTHON) $(PYDFU) -u $<
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else
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|
$(Q)$(DFU_UTIL) -a 0 -d $(DEVICE) -D $<
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|
endif
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|
|
|
# A board should specify TEXT0_ADDR if to use a different location than the
|
|
# default for the firmware memory location. A board can also optionally define
|
|
# TEXT1_ADDR to split the firmware into two sections; see below for details.
|
|
TEXT0_ADDR ?= 0x08000000
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|
|
|
ifeq ($(TEXT1_ADDR),)
|
|
# No TEXT1_ADDR given so put all firmware at TEXT0_ADDR location
|
|
|
|
TEXT0_SECTIONS ?= .isr_vector .text .data
|
|
|
|
deploy-stlink: $(BUILD)/firmware.dfu
|
|
$(ECHO) "Writing $(BUILD)/firmware.bin to the board via ST-LINK"
|
|
$(Q)$(STFLASH) write $(BUILD)/firmware.bin $(TEXT0_ADDR)
|
|
|
|
deploy-openocd: $(BUILD)/firmware.dfu
|
|
$(ECHO) "Writing $(BUILD)/firmware.bin to the board via ST-LINK using OpenOCD"
|
|
$(Q)$(OPENOCD) -f $(OPENOCD_CONFIG) -c "stm_flash $(BUILD)/firmware.bin $(TEXT0_ADDR)"
|
|
|
|
$(BUILD)/firmware.dfu: $(BUILD)/firmware.elf
|
|
$(ECHO) "Create $@"
|
|
$(Q)$(OBJCOPY) -O binary $(addprefix -j ,$(TEXT0_SECTIONS)) $^ $(BUILD)/firmware.bin
|
|
$(Q)$(PYTHON) $(DFU) -b $(TEXT0_ADDR):$(BUILD)/firmware.bin $@
|
|
|
|
else
|
|
# TEXT0_ADDR and TEXT1_ADDR are specified so split firmware between these locations
|
|
|
|
TEXT0_SECTIONS ?= .isr_vector
|
|
TEXT1_SECTIONS ?= .text .data
|
|
|
|
deploy-stlink: $(BUILD)/firmware.dfu
|
|
$(ECHO) "Writing $(BUILD)/firmware0.bin to the board via ST-LINK"
|
|
$(Q)$(STFLASH) write $(BUILD)/firmware0.bin $(TEXT0_ADDR)
|
|
$(ECHO) "Writing $(BUILD)/firmware1.bin to the board via ST-LINK"
|
|
$(Q)$(STFLASH) --reset write $(BUILD)/firmware1.bin $(TEXT1_ADDR)
|
|
|
|
deploy-openocd: $(BUILD)/firmware.dfu
|
|
$(ECHO) "Writing $(BUILD)/firmware{0,1}.bin to the board via ST-LINK using OpenOCD"
|
|
$(Q)$(OPENOCD) -f $(OPENOCD_CONFIG) -c "stm_flash $(BUILD)/firmware0.bin $(TEXT0_ADDR) $(BUILD)/firmware1.bin $(TEXT1_ADDR)"
|
|
|
|
$(BUILD)/firmware.dfu: $(BUILD)/firmware.elf
|
|
$(ECHO) "GEN $@"
|
|
$(Q)$(OBJCOPY) -O binary $(addprefix -j ,$(TEXT0_SECTIONS)) $^ $(BUILD)/firmware0.bin
|
|
$(Q)$(OBJCOPY) -O binary $(addprefix -j ,$(TEXT1_SECTIONS)) $^ $(BUILD)/firmware1.bin
|
|
$(Q)$(PYTHON) $(DFU) -b $(TEXT0_ADDR):$(BUILD)/firmware0.bin -b $(TEXT1_ADDR):$(BUILD)/firmware1.bin $@
|
|
|
|
endif
|
|
|
|
$(BUILD)/firmware.hex: $(BUILD)/firmware.elf
|
|
$(ECHO) "GEN $@"
|
|
$(Q)$(OBJCOPY) -O ihex $< $@
|
|
|
|
$(BUILD)/firmware.elf: $(OBJ)
|
|
$(ECHO) "LINK $@"
|
|
$(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LDFLAGS_MOD) $(LIBS)
|
|
$(Q)$(SIZE) $@
|
|
|
|
PLLVALUES = boards/pllvalues.py
|
|
MAKE_PINS = boards/make-pins.py
|
|
BOARD_PINS = $(BOARD_DIR)/pins.csv
|
|
PREFIX_FILE = boards/stm32f4xx_prefix.c
|
|
GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
|
|
GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
|
|
GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
|
|
GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
|
|
GEN_PINS_AF_DEFS = $(HEADER_BUILD)/pins_af_defs.h
|
|
GEN_PINS_AF_PY = $(BUILD)/pins_af.py
|
|
|
|
INSERT_USB_IDS = $(TOP)/tools/insert-usb-ids.py
|
|
FILE2H = $(TOP)/tools/file2h.py
|
|
|
|
USB_IDS_FILE = usb.h
|
|
CDCINF_TEMPLATE = pybcdc.inf_template
|
|
GEN_CDCINF_FILE = $(HEADER_BUILD)/pybcdc.inf
|
|
GEN_CDCINF_HEADER = $(HEADER_BUILD)/pybcdc_inf.h
|
|
|
|
# List of sources for qstr extraction
|
|
SRC_QSTR += $(SRC_C) $(SRC_MOD) $(SRC_LIB) $(EXTMOD_SRC_C)
|
|
# Append any auto-generated sources that are needed by sources listed in
|
|
# SRC_QSTR
|
|
SRC_QSTR_AUTO_DEPS += $(GEN_CDCINF_HEADER)
|
|
|
|
# Making OBJ use an order-only depenedency on the generated pins.h file
|
|
# has the side effect of making the pins.h file before we actually compile
|
|
# any of the objects. The normal dependency generation will deal with the
|
|
# case when pins.h is modified. But when it doesn't exist, we don't know
|
|
# which source files might need it.
|
|
$(OBJ): | $(GEN_PINS_HDR)
|
|
|
|
# With conditional pins, we may need to regenerate qstrdefs.h when config
|
|
# options change.
|
|
$(HEADER_BUILD)/qstrdefs.generated.h: $(BOARD_DIR)/mpconfigboard.h
|
|
|
|
# main.c can't be even preprocessed without $(GEN_CDCINF_HEADER)
|
|
main.c: $(GEN_CDCINF_HEADER)
|
|
|
|
# Use a pattern rule here so that make will only call make-pins.py once to make
|
|
# both pins_$(BOARD).c and pins.h
|
|
$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(HEADER_BUILD)/%_af_defs.h $(BUILD)/%_qstr.h: $(BOARD_DIR)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
|
|
$(ECHO) "GEN $@"
|
|
$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) \
|
|
--prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --hdr-obj-decls \
|
|
--qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) \
|
|
--af-defs $(GEN_PINS_AF_DEFS) --af-defs-cmp-strings \
|
|
--af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
|
|
|
|
$(BUILD)/pins_$(BOARD).o: $(BUILD)/pins_$(BOARD).c
|
|
$(call compile_c)
|
|
|
|
GEN_PLLFREQTABLE_HDR = $(HEADER_BUILD)/pllfreqtable.h
|
|
GEN_STMCONST_HDR = $(HEADER_BUILD)/modstm_const.h
|
|
GEN_STMCONST_QSTR = $(BUILD)/modstm_qstr.h
|
|
GEN_STMCONST_MPZ = $(HEADER_BUILD)/modstm_mpz.h
|
|
CMSIS_MCU_LOWER = $(shell echo $(CMSIS_MCU) | tr '[:upper:]' '[:lower:]')
|
|
CMSIS_MCU_HDR = $(CMSIS_DIR)/$(CMSIS_MCU_LOWER).h
|
|
|
|
modmachine.c: $(GEN_PLLFREQTABLE_HDR)
|
|
$(GEN_PLLFREQTABLE_HDR): $(PLLVALUES) | $(HEADER_BUILD)
|
|
$(ECHO) "GEN $@"
|
|
$(Q)$(PYTHON) $(PLLVALUES) -c $(if $(filter $(MCU_SERIES),f7),--relax-pll48,) file:$(BOARD_DIR)/stm32$(MCU_SERIES)xx_hal_conf.h > $@
|
|
|
|
$(BUILD)/modstm.o: $(GEN_STMCONST_HDR)
|
|
# Use a pattern rule here so that make will only call make-stmconst.py once to
|
|
# make both modstm_const.h and modstm_qstr.h
|
|
$(HEADER_BUILD)/%_const.h $(BUILD)/%_qstr.h: $(CMSIS_MCU_HDR) make-stmconst.py | $(HEADER_BUILD)
|
|
$(ECHO) "GEN stmconst $@"
|
|
$(Q)$(PYTHON) make-stmconst.py --qstr $(GEN_STMCONST_QSTR) --mpz $(GEN_STMCONST_MPZ) $(CMSIS_MCU_HDR) > $(GEN_STMCONST_HDR)
|
|
|
|
$(GEN_CDCINF_HEADER): $(GEN_CDCINF_FILE) $(FILE2H) | $(HEADER_BUILD)
|
|
$(ECHO) "GEN $@"
|
|
$(Q)$(PYTHON) $(FILE2H) $< > $@
|
|
|
|
$(GEN_CDCINF_FILE): $(CDCINF_TEMPLATE) $(INSERT_USB_IDS) $(USB_IDS_FILE) | $(HEADER_BUILD)
|
|
$(ECHO) "GEN $@"
|
|
$(Q)$(PYTHON) $(INSERT_USB_IDS) $(USB_IDS_FILE) $< > $@
|
|
|
|
include $(TOP)/py/mkrules.mk
|