mirror of
https://github.com/licsber/micropython.git
synced 2024-09-20 17:10:24 +08:00
9bcdb0acd1
These were copied from the stm32 port (then stmhal) at the very beginning of this port, with the anticipation that the esp8266 port would have board definition files with a list of valid pins and their names. But that has not been implemented and likely won't be, so remove the corresponding lines from the Makefile.
211 lines
5.0 KiB
Makefile
211 lines
5.0 KiB
Makefile
include ../../py/mkenv.mk
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# qstr definitions (must come before including py.mk)
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QSTR_DEFS = qstrdefsport.h #$(BUILD)/pins_qstr.h
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MICROPY_PY_USSL = 1
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MICROPY_SSL_AXTLS = 1
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MICROPY_FATFS = 1
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MICROPY_PY_BTREE = 1
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BTREE_DEFS_EXTRA = -DDEFPSIZE=1024 -DMINCACHE=3
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FROZEN_DIR ?= scripts
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FROZEN_MPY_DIR ?= modules
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# include py core make definitions
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include $(TOP)/py/py.mk
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FWBIN = $(BUILD)/firmware-combined.bin
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PORT ?= /dev/ttyACM0
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BAUD ?= 115200
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FLASH_MODE ?= qio
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FLASH_SIZE ?= detect
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CROSS_COMPILE = xtensa-lx106-elf-
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ESP_SDK = $(shell $(CC) -print-sysroot)/usr
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INC += -I.
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INC += -I$(TOP)
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INC += -I$(BUILD)
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INC += -I$(ESP_SDK)/include
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# UART for "os" messages. 0 is normal UART as used by MicroPython REPL,
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# 1 is debug UART (tx only), -1 to disable.
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UART_OS = 0
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CFLAGS_XTENSA = -fsingle-precision-constant -Wdouble-promotion \
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-D__ets__ -DICACHE_FLASH \
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-fno-inline-functions \
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-Wl,-EL -mlongcalls -mtext-section-literals -mforce-l32 \
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-DLWIP_OPEN_SRC
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CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -std=gnu99 -nostdlib -DUART_OS=$(UART_OS) \
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$(CFLAGS_XTENSA) $(CFLAGS_MOD) $(COPT) $(CFLAGS_EXTRA)
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LDSCRIPT = esp8266.ld
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LDFLAGS = -nostdlib -T $(LDSCRIPT) -Map=$(@:.elf=.map) --cref
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LIBS = -L$(ESP_SDK)/lib -lmain -ljson -llwip_open -lpp -lnet80211 -lwpa -lphy -lnet80211 $(LDFLAGS_MOD)
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LIBGCC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
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LIBS += -L$(dir $(LIBGCC_FILE_NAME)) -lgcc
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# Debugging/Optimization
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ifeq ($(DEBUG), 1)
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CFLAGS += -g
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COPT = -O0
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else
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CFLAGS += -fdata-sections -ffunction-sections
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COPT += -Os -DNDEBUG
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LDFLAGS += --gc-sections
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endif
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SRC_C = \
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strtoll.c \
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main.c \
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help.c \
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esp_mphal.c \
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esp_init_data.c \
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gccollect.c \
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lexerstr32.c \
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uart.c \
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esppwm.c \
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espneopixel.c \
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espapa102.c \
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intr.c \
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modpyb.c \
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modmachine.c \
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machine_pin.c \
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machine_pwm.c \
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machine_rtc.c \
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machine_adc.c \
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machine_uart.c \
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machine_wdt.c \
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machine_hspi.c \
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modesp.c \
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modnetwork.c \
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modutime.c \
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moduos.c \
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ets_alt_task.c \
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fatfs_port.c \
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posix_helpers.c \
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hspi.c \
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$(SRC_MOD)
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EXTMOD_SRC_C = $(addprefix extmod/,\
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modlwip.c \
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modonewire.c \
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)
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LIB_SRC_C = $(addprefix lib/,\
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libc/string0.c \
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libm/math.c \
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libm/fmodf.c \
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libm/nearbyintf.c \
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libm/ef_sqrt.c \
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libm/kf_rem_pio2.c \
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libm/kf_sin.c \
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libm/kf_cos.c \
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libm/kf_tan.c \
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libm/ef_rem_pio2.c \
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libm/sf_sin.c \
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libm/sf_cos.c \
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libm/sf_tan.c \
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libm/sf_frexp.c \
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libm/sf_modf.c \
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libm/sf_ldexp.c \
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libm/asinfacosf.c \
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libm/atanf.c \
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libm/atan2f.c \
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mp-readline/readline.c \
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netutils/netutils.c \
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timeutils/timeutils.c \
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utils/pyexec.c \
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utils/interrupt_char.c \
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utils/sys_stdio_mphal.c \
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)
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ifeq ($(MICROPY_FATFS), 1)
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LIB_SRC_C += \
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lib/oofatfs/ff.c \
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lib/oofatfs/option/unicode.c
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endif
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DRIVERS_SRC_C = $(addprefix drivers/,\
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dht/dht.c \
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)
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SRC_S = \
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gchelper.s \
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OBJ =
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OBJ += $(PY_O)
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OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o))
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OBJ += $(addprefix $(BUILD)/, $(EXTMOD_SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o))
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# List of sources for qstr extraction
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SRC_QSTR += $(SRC_C) $(EXTMOD_SRC_C) $(LIB_SRC_C) $(DRIVERS_SRC_C)
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# Append any auto-generated sources that are needed by sources listed in SRC_QSTR
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SRC_QSTR_AUTO_DEPS +=
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all: $(BUILD)/libaxtls.a $(FWBIN)
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CONFVARS_FILE = $(BUILD)/confvars
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ifeq ($(wildcard $(CONFVARS_FILE)),)
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$(shell $(MKDIR) -p $(BUILD))
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$(shell echo $(FROZEN_DIR) $(UART_OS) > $(CONFVARS_FILE))
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else ifneq ($(shell cat $(CONFVARS_FILE)), $(FROZEN_DIR) $(UART_OS))
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$(shell echo $(FROZEN_DIR) $(UART_OS) > $(CONFVARS_FILE))
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endif
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$(BUILD)/uart.o: $(CONFVARS_FILE)
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FROZEN_EXTRA_DEPS = $(CONFVARS_FILE)
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.PHONY: deploy
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deploy: $(BUILD)/firmware-combined.bin
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$(ECHO) "Writing $< to the board"
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$(Q)esptool.py --port $(PORT) --baud $(BAUD) write_flash --verify --flash_size=$(FLASH_SIZE) --flash_mode=$(FLASH_MODE) 0 $<
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erase:
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$(ECHO) "Erase flash"
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$(Q)esptool.py --port $(PORT) --baud $(BAUD) erase_flash
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reset:
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echo -e "\r\nimport machine; machine.reset()\r\n" >$(PORT)
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$(FWBIN): $(BUILD)/firmware.elf
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$(ECHO) "Create $@"
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$(Q)esptool.py elf2image $^
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$(Q)$(PYTHON) makeimg.py $(BUILD)/firmware.elf-0x00000.bin $(BUILD)/firmware.elf-0x[0-5][1-f]000.bin $@
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$(BUILD)/firmware.elf: $(OBJ)
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$(ECHO) "LINK $@"
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$(Q)$(LD) $(LDFLAGS) -o $@ $^ $(LIBS)
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$(Q)$(SIZE) $@
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512k:
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$(MAKE) LDSCRIPT=esp8266_512k.ld CFLAGS_EXTRA='-DMP_CONFIGFILE="<mpconfigport_512k.h>"' MICROPY_FATFS=0 MICROPY_PY_BTREE=0
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ota:
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rm -f $(BUILD)/firmware.elf $(BUILD)/firmware.elf*.bin
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$(MAKE) LDSCRIPT=esp8266_ota.ld FWBIN=$(BUILD)/firmware-ota.bin
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include $(TOP)/py/mkrules.mk
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axtls: $(BUILD)/libaxtls.a
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$(BUILD)/libaxtls.a:
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cd $(TOP)/lib/axtls; cp config/upyconfig config/.config
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cd $(TOP)/lib/axtls; $(MAKE) oldconfig -B
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cd $(TOP)/lib/axtls; $(MAKE) clean
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cd $(TOP)/lib/axtls; $(MAKE) all CC="$(CC)" LD="$(LD)" AR="$(AR)" CFLAGS_EXTRA="$(CFLAGS_XTENSA) -Dabort=abort_ -DRT_MAX_PLAIN_LENGTH=1024 -DRT_EXTRA=4096"
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cp $(TOP)/lib/axtls/_stage/libaxtls.a $@
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clean-modules:
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git clean -f -d modules
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rm -f build/frozen*.c
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