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https://github.com/licsber/micropython.git
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85afed569d
It was only partially working and will be rpelaced later by a full machine.UART class implementation.
104 lines
3.7 KiB
C
104 lines
3.7 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* This file initialises the USB (tinyUSB) and USART (SERCOM). Board USART settings
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* are set in 'boards/<board>/mpconfigboard.h.
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*
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* IMPORTANT: Please refer to "I/O Multiplexing and Considerations" chapters
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* in device datasheets for I/O Pin functions and assignments.
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/runtime.h"
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#include "modmachine.h"
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#include "samd_soc.h"
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#include "tusb.h"
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static void usb_init(void) {
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// Init USB clock
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#if defined(MCU_SAMD21)
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID_USB;
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PM->AHBMASK.bit.USB_ = 1;
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PM->APBBMASK.bit.USB_ = 1;
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uint8_t alt = 6; // alt G, USB
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#elif defined(MCU_SAMD51)
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GCLK->PCHCTRL[USB_GCLK_ID].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN_GCLK1;
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while (GCLK->PCHCTRL[USB_GCLK_ID].bit.CHEN == 0) {
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}
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MCLK->AHBMASK.bit.USB_ = 1;
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MCLK->APBBMASK.bit.USB_ = 1;
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uint8_t alt = 7; // alt H, USB
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#endif
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// Init USB pins
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PORT->Group[0].DIRSET.reg = 1 << 25 | 1 << 24;
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PORT->Group[0].OUTCLR.reg = 1 << 25 | 1 << 24;
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PORT->Group[0].PMUX[12].reg = alt << 4 | alt;
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PORT->Group[0].PINCFG[24].reg = PORT_PINCFG_PMUXEN;
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PORT->Group[0].PINCFG[25].reg = PORT_PINCFG_PMUXEN;
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tusb_init();
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}
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void samd_init(void) {
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#if defined(MCU_SAMD21)
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NVMCTRL->CTRLB.bit.MANW = 1; // errata "Spurious Writes"
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NVMCTRL->CTRLB.bit.RWS = 1; // 1 read wait state for 48MHz
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// Enable DFLL48M
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SYSCTRL->DFLLCTRL.reg = SYSCTRL_DFLLCTRL_ENABLE;
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while (!SYSCTRL->PCLKSR.bit.DFLLRDY) {
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}
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SYSCTRL->DFLLMUL.reg = SYSCTRL_DFLLMUL_CSTEP(1) | SYSCTRL_DFLLMUL_FSTEP(1)
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| SYSCTRL_DFLLMUL_MUL(48000);
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uint32_t coarse = (*((uint32_t *)FUSES_DFLL48M_COARSE_CAL_ADDR) & FUSES_DFLL48M_COARSE_CAL_Msk)
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>> FUSES_DFLL48M_COARSE_CAL_Pos;
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if (coarse == 0x3f) {
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coarse = 0x1f;
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}
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uint32_t fine = 512;
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SYSCTRL->DFLLVAL.reg = SYSCTRL_DFLLVAL_COARSE(coarse) | SYSCTRL_DFLLVAL_FINE(fine);
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SYSCTRL->DFLLCTRL.reg = SYSCTRL_DFLLCTRL_CCDIS | SYSCTRL_DFLLCTRL_USBCRM
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| SYSCTRL_DFLLCTRL_MODE | SYSCTRL_DFLLCTRL_ENABLE;
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while (!SYSCTRL->PCLKSR.bit.DFLLRDY) {
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}
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GCLK->GENDIV.reg = GCLK_GENDIV_ID(0) | GCLK_GENDIV_DIV(1);
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GCLK->GENCTRL.reg = GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL48M | GCLK_GENCTRL_ID(0);
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while (GCLK->STATUS.bit.SYNCBUSY) {
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}
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#elif defined(MCU_SAMD51)
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GCLK->GENCTRL[1].reg = 1 << GCLK_GENCTRL_DIV_Pos | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL;
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while (GCLK->SYNCBUSY.bit.GENCTRL1) {
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}
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#endif
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SysTick_Config(CPU_FREQ / 1000);
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usb_init();
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}
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