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https://github.com/licsber/micropython.git
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3786592097
Optimisations are: - Remove FLASH_ISR section since devices with a small flash sector erase size don't need special FLASH_ISR handling. This reduces flash image by approx 1.5k. - Make SRAM2 contiguous with SRAM1 where possible. - Simplify configuration of 2k RAM buffer used for flash filesystem. RAM changes with this commit: - L432: stack 6k -> 10k, bss + heap 42k -> 52k - L476: stack 16k -> 30k, bss + heap 80k -> 96k - L496: stack 206k -> 16k, bss + heap 112k -> 302k
36 lines
1.3 KiB
Plaintext
36 lines
1.3 KiB
Plaintext
/*
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GNU linker script for STM32L476XG
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*/
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* sectors 0-255 */
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FLASH_FS (r) : ORIGIN = 0x08080000, LENGTH = 512K /* sectors 256-511 */
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
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SRAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K /* not contiguous with RAM */
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}
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/* produce a link error if there is not this amount of RAM for these sections */
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_minimum_stack_size = 2K;
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_minimum_heap_size = 16K;
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/* Define the stack. The stack is full descending so begins just above last byte of RAM,
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or bottom of FS cache.. Note that EABI requires the stack to be 8-byte aligned for a call. */
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/* RAM extents for the garbage collector */
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_ram_start = ORIGIN(RAM);
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_ram_end = ORIGIN(RAM) + LENGTH(RAM);
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_ram_fs_cache_end = ORIGIN(SRAM2) + LENGTH(SRAM2); /* fs_cache in SRAM2 */
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_ram_fs_cache_start = _ram_fs_cache_end - 2K; /* fs cache = 2K */
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_estack = _ram_fs_cache_start - _estack_reserve; /* stack in SRAM2 */
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_sstack = ORIGIN(SRAM2); /* stack = 30K */
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_heap_start = _ebss; /* heap starts just after statically allocated memory */
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_heap_end = _ram_end; /* bss + heap = 96K, tunable by adjusting stack size */
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_flash_fs_start = ORIGIN(FLASH_FS);
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_flash_fs_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
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