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7ee5afe8d1
This changes the signatures of QSPI write_cmd_data, write_cmd_addr_data and read_cmd_qaddr_qdata so they return an error code. The softqspi and stm32 hardware qspi driver are updated to follow this new signature. Also the spiflash driver is updated to use these new return values. Signed-off-by: Damien George <damien@micropython.org>
90 lines
3.3 KiB
C
90 lines
3.3 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016-2018 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef MICROPY_INCLUDED_DRIVERS_MEMORY_SPIFLASH_H
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#define MICROPY_INCLUDED_DRIVERS_MEMORY_SPIFLASH_H
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#include "drivers/bus/spi.h"
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#include "drivers/bus/qspi.h"
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#define MP_SPIFLASH_ERASE_BLOCK_SIZE (4096) // must be a power of 2
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enum {
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MP_SPIFLASH_BUS_SPI,
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MP_SPIFLASH_BUS_QSPI,
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};
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struct _mp_spiflash_t;
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#if MICROPY_HW_SPIFLASH_ENABLE_CACHE
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// A cache must be provided by the user in the config struct. The same cache
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// struct can be shared by multiple SPI flash instances.
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typedef struct _mp_spiflash_cache_t {
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uint8_t buf[MP_SPIFLASH_ERASE_BLOCK_SIZE] __attribute__((aligned(4)));
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struct _mp_spiflash_t *user; // current user of buf, for shared use
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uint32_t block; // current block stored in buf; 0xffffffff if invalid
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} mp_spiflash_cache_t;
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#endif
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typedef struct _mp_spiflash_config_t {
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uint32_t bus_kind;
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union {
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struct {
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mp_hal_pin_obj_t cs;
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void *data;
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const mp_spi_proto_t *proto;
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} u_spi;
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struct {
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void *data;
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const mp_qspi_proto_t *proto;
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} u_qspi;
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} bus;
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#if MICROPY_HW_SPIFLASH_ENABLE_CACHE
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mp_spiflash_cache_t *cache; // can be NULL if cache functions not used
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#endif
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} mp_spiflash_config_t;
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typedef struct _mp_spiflash_t {
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const mp_spiflash_config_t *config;
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volatile uint32_t flags;
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} mp_spiflash_t;
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void mp_spiflash_init(mp_spiflash_t *self);
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void mp_spiflash_deepsleep(mp_spiflash_t *self, int value);
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// These functions go direct to the SPI flash device
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int mp_spiflash_erase_block(mp_spiflash_t *self, uint32_t addr);
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int mp_spiflash_read(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *dest);
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int mp_spiflash_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src);
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#if MICROPY_HW_SPIFLASH_ENABLE_CACHE
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// These functions use the cache (which must already be configured)
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int mp_spiflash_cache_flush(mp_spiflash_t *self);
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int mp_spiflash_cached_read(mp_spiflash_t *self, uint32_t addr, size_t len, uint8_t *dest);
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int mp_spiflash_cached_write(mp_spiflash_t *self, uint32_t addr, size_t len, const uint8_t *src);
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#endif
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#endif // MICROPY_INCLUDED_DRIVERS_MEMORY_SPIFLASH_H
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