mirror of
https://github.com/licsber/micropython.git
synced 2024-09-20 17:10:24 +08:00
964bf935a3
Recent vendor SDKs ship libs with code in .text section, which previously was going into .irom0.text. Adjust the linker script to route these sections back to iROM (follows upstream change).
310 lines
9.5 KiB
Plaintext
310 lines
9.5 KiB
Plaintext
/* GNU linker script for ESP8266, common sections and symbols */
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/* define the top of RAM */
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_heap_end = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
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PHDRS
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{
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dport0_0_phdr PT_LOAD;
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dram0_0_phdr PT_LOAD;
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dram0_0_bss_phdr PT_LOAD;
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iram1_0_phdr PT_LOAD;
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irom0_0_phdr PT_LOAD;
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}
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ENTRY(firmware_start)
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EXTERN(_DebugExceptionVector)
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EXTERN(_DoubleExceptionVector)
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EXTERN(_KernelExceptionVector)
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EXTERN(_NMIExceptionVector)
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EXTERN(_UserExceptionVector)
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_firmware_size = ORIGIN(irom0_0_seg) + LENGTH(irom0_0_seg) - 0x40200000;
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PROVIDE(_memmap_vecbase_reset = 0x40000000);
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/* Various memory-map dependent cache attribute settings: */
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_memmap_cacheattr_wb_base = 0x00000110;
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_memmap_cacheattr_wt_base = 0x00000110;
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_memmap_cacheattr_bp_base = 0x00000220;
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_memmap_cacheattr_unused_mask = 0xFFFFF00F;
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_memmap_cacheattr_wb_trapnull = 0x2222211F;
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_memmap_cacheattr_wba_trapnull = 0x2222211F;
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_memmap_cacheattr_wbna_trapnull = 0x2222211F;
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_memmap_cacheattr_wt_trapnull = 0x2222211F;
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_memmap_cacheattr_bp_trapnull = 0x2222222F;
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_memmap_cacheattr_wb_strict = 0xFFFFF11F;
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_memmap_cacheattr_wt_strict = 0xFFFFF11F;
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_memmap_cacheattr_bp_strict = 0xFFFFF22F;
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_memmap_cacheattr_wb_allvalid = 0x22222112;
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_memmap_cacheattr_wt_allvalid = 0x22222112;
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_memmap_cacheattr_bp_allvalid = 0x22222222;
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PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
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SECTIONS
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{
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.dport0.rodata : ALIGN(4)
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{
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_dport0_rodata_start = ABSOLUTE(.);
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*(.dport0.rodata)
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*(.dport.rodata)
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_dport0_rodata_end = ABSOLUTE(.);
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} >dport0_0_seg :dport0_0_phdr
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.dport0.literal : ALIGN(4)
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{
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_dport0_literal_start = ABSOLUTE(.);
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*(.dport0.literal)
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*(.dport.literal)
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_dport0_literal_end = ABSOLUTE(.);
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} >dport0_0_seg :dport0_0_phdr
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.dport0.data : ALIGN(4)
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{
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_dport0_data_start = ABSOLUTE(.);
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*(.dport0.data)
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*(.dport.data)
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_dport0_data_end = ABSOLUTE(.);
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} >dport0_0_seg :dport0_0_phdr
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.irom0.text : ALIGN(4)
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{
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_irom0_text_start = ABSOLUTE(.);
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*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
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/* Vendor SDK in v2.1.0-7-gb8fd588 started to build these with
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-ffunction-sections -fdata-sections, and require routing to
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irom via linker:
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https://github.com/espressif/ESP8266_NONOS_SDK/commit/b8fd588a33f0319dc135523b51655e97b483b205
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*/
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*libcrypto.a:(.literal.* .text.*)
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*libnet80211.a:(.literal.* .text.*)
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*libwpa.a:(.literal.* .text.*)
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*libwpa2.a:(.literal.* .text.*)
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/* we put some specific text in this section */
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*py/argcheck.o*(.literal* .text*)
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*py/asm*.o*(.literal* .text*)
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*py/bc.o*(.literal* .text*)
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*py/binary.o*(.literal* .text*)
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*py/builtin*.o*(.literal* .text*)
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*py/compile.o*(.literal* .text*)
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*py/emit*.o*(.literal* .text*)
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*py/persistentcode*.o*(.literal* .text*)
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*py/formatfloat.o*(.literal* .text*)
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*py/frozenmod.o*(.literal* .text*)
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*py/gc.o*(.literal* .text*)
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*py/reader*.o*(.literal* .text*)
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*py/lexer*.o*(.literal* .text*)
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*py/malloc*.o*(.literal* .text*)
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*py/map*.o*(.literal* .text*)
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*py/mod*.o*(.literal* .text*)
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*py/mpprint.o*(.literal* .text*)
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*py/mpstate.o*(.literal* .text*)
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*py/mpz.o*(.literal* .text*)
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*py/native*.o*(.literal* .text*)
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*py/nlr*.o*(.literal* .text*)
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*py/obj*.o*(.literal* .text*)
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*py/opmethods.o*(.literal* .text*)
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*py/parse*.o*(.literal* .text*)
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*py/qstr.o*(.literal* .text*)
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*py/repl.o*(.literal* .text*)
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*py/runtime.o*(.literal* .text*)
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*py/scheduler.o*(.literal* .text*)
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*py/scope.o*(.literal* .text*)
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*py/sequence.o*(.literal* .text*)
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*py/showbc.o*(.literal* .text*)
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*py/smallint.o*(.literal* .text*)
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*py/stackctrl.o*(.literal* .text*)
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*py/stream.o*(.literal* .text*)
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*py/unicode.o*(.literal* .text*)
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*py/vm.o*(.literal* .text*)
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*py/vstr.o*(.literal* .text*)
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*py/warning.o*(.literal* .text*)
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*extmod/*.o*(.literal* .text*)
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*lib/oofatfs/*.o*(.literal*, .text*)
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*/libaxtls.a:(.literal*, .text*)
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*lib/berkeley-db-1.xx/*.o(.literal*, .text*)
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*lib/libm/*.o*(.literal*, .text*)
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*lib/mp-readline/*.o(.literal*, .text*)
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*lib/netutils/*.o*(.literal*, .text*)
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*lib/timeutils/*.o*(.literal*, .text*)
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*lib/utils/*.o*(.literal*, .text*)
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build/main.o(.literal* .text*)
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*gccollect.o(.literal* .text*)
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*gchelper.o(.literal* .text*)
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*help.o(.literal* .text*)
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*lexerstr32.o(.literal* .text*)
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*utils.o(.literal* .text*)
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*modpyb.o(.literal*, .text*)
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*machine_pin.o(.literal*, .text*)
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*machine_pwm.o(.literal*, .text*)
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*machine_rtc.o(.literal*, .text*)
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*machine_adc.o(.literal*, .text*)
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*machine_uart.o(.literal*, .text*)
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*modpybi2c.o(.literal*, .text*)
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*modmachine.o(.literal*, .text*)
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*machine_wdt.o(.literal*, .text*)
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*machine_spi.o(.literal*, .text*)
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*machine_hspi.o(.literal*, .text*)
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*hspi.o(.literal*, .text*)
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*modesp.o(.literal* .text*)
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*modnetwork.o(.literal* .text*)
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*moduos.o(.literal* .text*)
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*modutime.o(.literal* .text*)
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*modlwip.o(.literal* .text*)
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*modsocket.o(.literal* .text*)
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*modonewire.o(.literal* .text*)
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/* we put as much rodata as possible in this section */
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/* note that only rodata accessed as a machine word is allowed here */
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*py/qstr.o(.rodata.const_pool)
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*.o(.rodata.mp_type_*) /* catches type: mp_obj_type_t */
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*.o(.rodata.*_locals_dict*) /* catches types: mp_obj_dict_t, mp_map_elem_t */
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*.o(.rodata.mp_module_*) /* catches types: mp_obj_module_t, mp_obj_dict_t, mp_map_elem_t */
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*/frozen.o(.rodata.mp_frozen_sizes) /* frozen modules */
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*/frozen.o(.rodata.mp_frozen_content) /* frozen modules */
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/* for -mforce-l32 */
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build/*.o(.rodata*)
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_irom0_text_end = ABSOLUTE(.);
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} >irom0_0_seg :irom0_0_phdr
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.text : ALIGN(4)
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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*(.UserEnter.text)
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. = ALIGN(16);
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*(.DebugExceptionVector.text)
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. = ALIGN(16);
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*(.NMIExceptionVector.text)
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. = ALIGN(16);
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*(.KernelExceptionVector.text)
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LONG(0)
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LONG(0)
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LONG(0)
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LONG(0)
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. = ALIGN(16);
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*(.UserExceptionVector.text)
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LONG(0)
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LONG(0)
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LONG(0)
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LONG(0)
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. = ALIGN(16);
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*(.DoubleExceptionVector.text)
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LONG(0)
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LONG(0)
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LONG(0)
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LONG(0)
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. = ALIGN (16);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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*(.literal .text .literal.* .text.* .iram0.literal .iram0.text .iram0.text.*.literal .iram0.text.*)
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*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_text_end = ABSOLUTE(.);
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_etext = .;
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} >iram1_0_seg :iram1_0_phdr
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.lit4 : ALIGN(4)
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{
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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} >iram1_0_seg :iram1_0_phdr
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.data : ALIGN(4)
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{
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_data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*(.jcr)
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_data_end = ABSOLUTE(.);
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} >dram0_0_seg :dram0_0_phdr
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.rodata : ALIGN(4)
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{
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_rodata_start = ABSOLUTE(.);
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*(.sdk.version)
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*(.rodata)
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*(.rodata.*)
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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*(.eh_frame)
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/* C++ constructor and destructor tables, properly ordered: */
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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. = ALIGN(4); /* this table MUST be 4-byte aligned */
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_bss_table_start = ABSOLUTE(.);
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LONG(_bss_start)
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LONG(_bss_end)
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_bss_table_end = ABSOLUTE(.);
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_rodata_end = ABSOLUTE(.);
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} >dram0_0_seg :dram0_0_phdr
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.bss ALIGN(8) (NOLOAD) : ALIGN(4)
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{
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. = ALIGN (8);
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_bss_start = ABSOLUTE(.);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN (8);
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_bss_end = ABSOLUTE(.);
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_heap_start = ABSOLUTE(.);
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} >dram0_0_seg :dram0_0_bss_phdr
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}
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/* get ROM code address */
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INCLUDE "eagle.rom.addr.v6.ld"
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