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5925004da3
This patch moves the check of SPI configuration before including any SPI header files. As targets might disable SPI support, current code ends up in including SPIM if not SPI is configured. Hence, this is why the check whether the module is enabled should be done before including headers.
442 lines
16 KiB
C
442 lines
16 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014 Damien P. George
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* Copyright (c) 2016 - 2018 Glenn Ruben Bakke
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* Copyright (c) 2018 Ayke van Laethem
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdio.h>
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#include <string.h>
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#include "py/runtime.h"
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#if MICROPY_PY_MACHINE_HW_SPI
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#include "py/nlr.h"
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#include "py/mphal.h"
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#include "extmod/machine_spi.h"
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#include "pin.h"
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#include "genhdr/pins.h"
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#include "spi.h"
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#if NRFX_SPI_ENABLED
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#include "nrfx_spi.h"
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#else
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#include "nrfx_spim.h"
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#endif
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/// \moduleref pyb
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/// \class SPI - a master-driven serial protocol
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///
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/// SPI is a serial protocol that is driven by a master. At the physical level
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/// there are 3 lines: SCK, MOSI, MISO.
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///
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/// See usage model of I2C; SPI is very similar. Main difference is
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/// parameters to init the SPI bus:
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///
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/// from pyb import SPI
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/// spi = SPI(1, SPI.MASTER, baudrate=600000, polarity=1, phase=0, crc=0x7)
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///
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/// Only required parameter is mode, SPI.MASTER or SPI.SLAVE. Polarity can be
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/// 0 or 1, and is the level the idle clock line sits at. Phase can be 0 or 1
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/// to sample data on the first or second clock edge respectively. Crc can be
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/// None for no CRC, or a polynomial specifier.
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///
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/// Additional method for SPI:
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///
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/// data = spi.send_recv(b'1234') # send 4 bytes and receive 4 bytes
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/// buf = bytearray(4)
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/// spi.send_recv(b'1234', buf) # send 4 bytes and receive 4 into buf
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/// spi.send_recv(buf, buf) # send/recv 4 bytes from/to buf
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#if NRFX_SPIM_ENABLED
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#define nrfx_spi_t nrfx_spim_t
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#define nrfx_spi_config_t nrfx_spim_config_t
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#define nrfx_spi_xfer_desc_t nrfx_spim_xfer_desc_t
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#define NRFX_SPI_PIN_NOT_USED NRFX_SPIM_PIN_NOT_USED
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#define NRFX_SPI_INSTANCE NRFX_SPIM_INSTANCE
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#define NRF_SPI_BIT_ORDER_LSB_FIRST NRF_SPIM_BIT_ORDER_LSB_FIRST
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#define NRF_SPI_BIT_ORDER_MSB_FIRST NRF_SPIM_BIT_ORDER_MSB_FIRST
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#define NRF_SPI_MODE_0 NRF_SPIM_MODE_0
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#define NRF_SPI_MODE_1 NRF_SPIM_MODE_1
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#define NRF_SPI_MODE_2 NRF_SPIM_MODE_2
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#define NRF_SPI_MODE_3 NRF_SPIM_MODE_3
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#define NRF_SPI_FREQ_125K NRF_SPIM_FREQ_125K
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#define NRF_SPI_FREQ_250K NRF_SPIM_FREQ_250K
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#define NRF_SPI_FREQ_500K NRF_SPIM_FREQ_500K
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#define NRF_SPI_FREQ_1M NRF_SPIM_FREQ_1M
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#define NRF_SPI_FREQ_2M NRF_SPIM_FREQ_2M
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#define NRF_SPI_FREQ_4M NRF_SPIM_FREQ_4M
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#define NRF_SPI_FREQ_8M NRF_SPIM_FREQ_8M
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#define nrfx_spi_init nrfx_spim_init
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#define nrfx_spi_uninit nrfx_spim_uninit
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#define nrfx_spi_xfer nrfx_spim_xfer
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#endif // NRFX_SPIM_ENABLED
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typedef struct _machine_hard_spi_obj_t {
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mp_obj_base_t base;
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const nrfx_spi_t * p_spi; // Driver instance
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nrfx_spi_config_t * p_config; // pointer to volatile part
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} machine_hard_spi_obj_t;
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STATIC const nrfx_spi_t machine_spi_instances[] = {
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NRFX_SPI_INSTANCE(0),
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NRFX_SPI_INSTANCE(1),
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#if defined(NRF52_SERIES)
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NRFX_SPI_INSTANCE(2),
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#if defined(NRF52840_XXAA) && NRFX_SPIM_ENABLED
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NRFX_SPI_INSTANCE(3),
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#endif // NRF52840_XXAA && NRFX_SPIM_ENABLED
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#endif // NRF52_SERIES
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};
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STATIC nrfx_spi_config_t configs[MP_ARRAY_SIZE(machine_spi_instances)];
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STATIC const machine_hard_spi_obj_t machine_hard_spi_obj[] = {
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{{&machine_hard_spi_type}, .p_spi = &machine_spi_instances[0], .p_config = &configs[0]},
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{{&machine_hard_spi_type}, .p_spi = &machine_spi_instances[1], .p_config = &configs[1]},
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#if defined(NRF52_SERIES)
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{{&machine_hard_spi_type}, .p_spi = &machine_spi_instances[2], .p_config = &configs[2]},
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#if defined(NRF52840_XXAA) && NRFX_SPIM_ENABLED
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{{&machine_hard_spi_type}, .p_spi = &machine_spi_instances[3], .p_config = &configs[3]},
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#endif // NRF52840_XXAA && NRFX_SPIM_ENABLED
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#endif // NRF52_SERIES
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};
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void spi_init0(void) {
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}
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STATIC int spi_find(mp_obj_t id) {
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if (MP_OBJ_IS_STR(id)) {
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// given a string id
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const char *port = mp_obj_str_get_str(id);
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if (0) {
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#ifdef MICROPY_HW_SPI0_NAME
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} else if (strcmp(port, MICROPY_HW_SPI0_NAME) == 0) {
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return 1;
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#endif
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}
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nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError,
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"SPI(%s) does not exist", port));
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} else {
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// given an integer id
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int spi_id = mp_obj_get_int(id);
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if (spi_id >= 0 && spi_id < MP_ARRAY_SIZE(machine_hard_spi_obj)) {
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return spi_id;
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}
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nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError,
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"SPI(%d) does not exist", spi_id));
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}
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}
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void spi_transfer(const machine_hard_spi_obj_t * self, size_t len, const void * src, void * dest) {
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nrfx_spi_xfer_desc_t xfer_desc = {
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.p_tx_buffer = src,
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.tx_length = len,
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.p_rx_buffer = dest,
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.rx_length = len
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};
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nrfx_spi_xfer(self->p_spi, &xfer_desc, 0);
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}
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/******************************************************************************/
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/* MicroPython bindings for machine API */
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// for make_new
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enum {
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ARG_NEW_id,
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ARG_NEW_baudrate,
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ARG_NEW_polarity,
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ARG_NEW_phase,
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ARG_NEW_bits,
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ARG_NEW_firstbit,
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ARG_NEW_sck,
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ARG_NEW_mosi,
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ARG_NEW_miso
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};
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// for init
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enum {
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ARG_INIT_baudrate,
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ARG_INIT_polarity,
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ARG_INIT_phase,
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ARG_INIT_bits,
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ARG_INIT_firstbit
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};
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STATIC mp_obj_t machine_hard_spi_make_new(mp_arg_val_t *args);
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STATIC void machine_hard_spi_init(mp_obj_t self, mp_arg_val_t *args);
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STATIC void machine_hard_spi_deinit(mp_obj_t self);
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/* common code for both soft and hard implementations *************************/
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STATIC mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_id, MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(-1)} },
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{ MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 1000000} },
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{ MP_QSTR_polarity, MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_phase, MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} },
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{ MP_QSTR_firstbit, MP_ARG_INT, {.u_int = 0 /* SPI_FIRSTBIT_MSB */} },
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{ MP_QSTR_sck, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_mosi, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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{ MP_QSTR_miso, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
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};
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// parse args
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all_kw_array(n_args, n_kw, all_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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if (args[ARG_NEW_id].u_obj == MP_OBJ_NEW_SMALL_INT(-1)) {
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// TODO: implement soft SPI
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// return machine_soft_spi_make_new(args);
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return mp_const_none;
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} else {
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// hardware peripheral id given
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return machine_hard_spi_make_new(args);
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}
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}
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STATIC mp_obj_t machine_spi_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000000} },
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{ MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
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{ MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} },
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{ MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
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};
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// parse args
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mp_obj_t self = pos_args[0];
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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// dispatch to specific implementation
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if (mp_obj_get_type(self) == &machine_hard_spi_type) {
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machine_hard_spi_init(self, args);
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}
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_spi_init_obj, 1, machine_spi_init);
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STATIC mp_obj_t machine_spi_deinit(mp_obj_t self) {
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// dispatch to specific implementation
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if (mp_obj_get_type(self) == &machine_hard_spi_type) {
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machine_hard_spi_deinit(self);
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}
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_spi_deinit_obj, machine_spi_deinit);
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STATIC const mp_rom_map_elem_t machine_spi_locals_dict_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_spi_init_obj) },
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{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_spi_deinit_obj) },
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{ MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_machine_spi_read_obj) },
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{ MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_machine_spi_readinto_obj) },
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{ MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_machine_spi_write_obj) },
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{ MP_ROM_QSTR(MP_QSTR_write_readinto), MP_ROM_PTR(&mp_machine_spi_write_readinto_obj) },
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{ MP_ROM_QSTR(MP_QSTR_MSB), MP_ROM_INT(NRF_SPI_BIT_ORDER_MSB_FIRST) },
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{ MP_ROM_QSTR(MP_QSTR_LSB), MP_ROM_INT(NRF_SPI_BIT_ORDER_LSB_FIRST) },
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};
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STATIC MP_DEFINE_CONST_DICT(machine_spi_locals_dict, machine_spi_locals_dict_table);
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/* code for hard implementation ***********************************************/
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STATIC void machine_hard_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
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machine_hard_spi_obj_t *self = self_in;
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mp_printf(print, "SPI(%u)", self->p_spi->drv_inst_idx);
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}
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STATIC mp_obj_t machine_hard_spi_make_new(mp_arg_val_t *args) {
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// get static peripheral object
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int spi_id = spi_find(args[ARG_NEW_id].u_obj);
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const machine_hard_spi_obj_t *self = &machine_hard_spi_obj[spi_id];
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// here we would check the sck/mosi/miso pins and configure them
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if (args[ARG_NEW_sck].u_obj != MP_OBJ_NULL
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&& args[ARG_NEW_mosi].u_obj != MP_OBJ_NULL
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&& args[ARG_NEW_miso].u_obj != MP_OBJ_NULL) {
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self->p_config->sck_pin = mp_hal_get_pin_obj(args[ARG_NEW_sck].u_obj)->pin;
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self->p_config->mosi_pin = mp_hal_get_pin_obj(args[ARG_NEW_mosi].u_obj)->pin;
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self->p_config->miso_pin = mp_hal_get_pin_obj(args[ARG_NEW_miso].u_obj)->pin;
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} else {
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self->p_config->sck_pin = MICROPY_HW_SPI0_SCK;
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self->p_config->mosi_pin = MICROPY_HW_SPI0_MOSI;
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self->p_config->miso_pin = MICROPY_HW_SPI0_MISO;
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}
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// Manually trigger slave select from upper layer.
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self->p_config->ss_pin = NRFX_SPI_PIN_NOT_USED;
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#ifdef NRF51
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self->p_config->irq_priority = 3;
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#else
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self->p_config->irq_priority = 6;
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#endif
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mp_obj_t self_obj = MP_OBJ_FROM_PTR(self);
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machine_hard_spi_init(self_obj, &args[1]); // Skip instance id param.
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return self_obj;
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}
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STATIC void machine_hard_spi_init(mp_obj_t self_in, mp_arg_val_t *args) {
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const machine_hard_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
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int baudrate = args[ARG_INIT_baudrate].u_int;
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if (baudrate <= 125000) {
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self->p_config->frequency = NRF_SPI_FREQ_125K;
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} else if (baudrate <= 250000) {
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self->p_config->frequency = NRF_SPI_FREQ_250K;
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} else if (baudrate <= 500000) {
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self->p_config->frequency = NRF_SPI_FREQ_500K;
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} else if (baudrate <= 1000000) {
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self->p_config->frequency = NRF_SPI_FREQ_1M;
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} else if (baudrate <= 2000000) {
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self->p_config->frequency = NRF_SPI_FREQ_2M;
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} else if (baudrate <= 4000000) {
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self->p_config->frequency = NRF_SPI_FREQ_4M;
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} else if (baudrate <= 8000000) {
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self->p_config->frequency = NRF_SPI_FREQ_8M;
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#if defined(NRF52840_XXAA) && NRFX_SPIM_ENABLED
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} else if (baudrate <= 16000000) {
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self->p_config->frequency = NRF_SPIM_FREQ_16M;
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} else if (baudrate <= 32000000) {
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self->p_config->frequency = NRF_SPIM_FREQ_32M;
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#endif // NRF52840_XXAA && NRFX_SPIM_ENABLED
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} else { // Default
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self->p_config->frequency = NRF_SPI_FREQ_1M;
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}
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// Active high
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if (args[ARG_INIT_polarity].u_int == 0) {
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if (args[ARG_INIT_phase].u_int == 0) {
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// First clock edge
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self->p_config->mode = NRF_SPI_MODE_0;
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} else {
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// Second clock edge
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self->p_config->mode = NRF_SPI_MODE_1;
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}
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// Active low
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} else {
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if (args[ARG_INIT_phase].u_int == 0) {
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// First clock edge
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self->p_config->mode = NRF_SPI_MODE_2;
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} else {
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// Second clock edge
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self->p_config->mode = NRF_SPI_MODE_3;
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}
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}
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self->p_config->orc = 0xFF; // Overrun character
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self->p_config->bit_order = (args[ARG_INIT_firstbit].u_int == 0) ? NRF_SPI_BIT_ORDER_MSB_FIRST : NRF_SPI_BIT_ORDER_LSB_FIRST;
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// Set context to this instance of SPI
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nrfx_err_t err_code = nrfx_spi_init(self->p_spi, self->p_config, NULL, (void *)self);
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if (err_code == NRFX_ERROR_INVALID_STATE) {
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// Instance already initialized, deinitialize first.
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nrfx_spi_uninit(self->p_spi);
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// Initialize again.
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nrfx_spi_init(self->p_spi, self->p_config, NULL, (void *)self);
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}
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}
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STATIC void machine_hard_spi_deinit(mp_obj_t self_in) {
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const machine_hard_spi_obj_t *self = MP_OBJ_TO_PTR(self_in);
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nrfx_spi_uninit(self->p_spi);
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}
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STATIC void machine_hard_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) {
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const machine_hard_spi_obj_t *self = (machine_hard_spi_obj_t*)self_in;
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spi_transfer(self, len, src, dest);
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}
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STATIC mp_obj_t mp_machine_spi_read(size_t n_args, const mp_obj_t *args) {
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vstr_t vstr;
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vstr_init_len(&vstr, mp_obj_get_int(args[1]));
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memset(vstr.buf, n_args == 3 ? mp_obj_get_int(args[2]) : 0, vstr.len);
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spi_transfer(args[0], vstr.len, vstr.buf, vstr.buf);
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return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr);
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}
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MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_read_obj, 2, 3, mp_machine_spi_read);
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|
|
|
STATIC mp_obj_t mp_machine_spi_readinto(size_t n_args, const mp_obj_t *args) {
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|
mp_buffer_info_t bufinfo;
|
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mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_WRITE);
|
|
memset(bufinfo.buf, n_args == 3 ? mp_obj_get_int(args[2]) : 0, bufinfo.len);
|
|
spi_transfer(args[0], bufinfo.len, bufinfo.buf, bufinfo.buf);
|
|
return mp_const_none;
|
|
}
|
|
MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_readinto_obj, 2, 3, mp_machine_spi_readinto);
|
|
|
|
STATIC mp_obj_t mp_machine_spi_write(mp_obj_t self, mp_obj_t wr_buf) {
|
|
mp_buffer_info_t src;
|
|
mp_get_buffer_raise(wr_buf, &src, MP_BUFFER_READ);
|
|
spi_transfer(self, src.len, (const uint8_t*)src.buf, NULL);
|
|
return mp_const_none;
|
|
}
|
|
MP_DEFINE_CONST_FUN_OBJ_2(mp_machine_spi_write_obj, mp_machine_spi_write);
|
|
|
|
STATIC mp_obj_t mp_machine_spi_write_readinto(mp_obj_t self, mp_obj_t wr_buf, mp_obj_t rd_buf) {
|
|
mp_buffer_info_t src;
|
|
mp_get_buffer_raise(wr_buf, &src, MP_BUFFER_READ);
|
|
mp_buffer_info_t dest;
|
|
mp_get_buffer_raise(rd_buf, &dest, MP_BUFFER_WRITE);
|
|
if (src.len != dest.len) {
|
|
mp_raise_ValueError("buffers must be the same length");
|
|
}
|
|
spi_transfer(self, src.len, src.buf, dest.buf);
|
|
return mp_const_none;
|
|
}
|
|
MP_DEFINE_CONST_FUN_OBJ_3(mp_machine_spi_write_readinto_obj, mp_machine_spi_write_readinto);
|
|
|
|
|
|
STATIC const mp_machine_spi_p_t machine_hard_spi_p = {
|
|
.transfer = machine_hard_spi_transfer,
|
|
};
|
|
|
|
const mp_obj_type_t machine_hard_spi_type = {
|
|
{ &mp_type_type },
|
|
.name = MP_QSTR_SPI,
|
|
.print = machine_hard_spi_print,
|
|
.make_new = machine_spi_make_new,
|
|
.protocol = &machine_hard_spi_p,
|
|
.locals_dict = (mp_obj_dict_t*)&machine_spi_locals_dict,
|
|
};
|
|
|
|
#endif // MICROPY_PY_MACHINE_HW_SPI
|