micropython/ports
Damien George 47550ef2cd stm32: For MCUs that have PLLSAI allow to set SYSCLK at 2MHz increments.
MCUs that have a PLLSAI can use it to generate a 48MHz clock for USB, SDIO
and RNG peripherals.  In such cases the SYSCLK is not restricted to values
that allow the system PLL to generate 48MHz, but can be any frequency.
This patch allows such configurability for F7 MCUs, allowing the SYSCLK to
be set in 2MHz increments via machine.freq().  PLLSAI will only be enabled
if needed, and consumes about 1mA extra.  This fine grained control of
frequency is useful to get accurate SPI baudrates, for example.
2018-09-11 16:42:57 +10:00
..
bare-arm ports/{bare-arm,minimal}/Makefile: Only build with core source files. 2018-02-22 12:48:51 +11:00
cc3200 cc3200/mods: Access dict map directly instead of using helper func. 2018-07-08 22:08:24 +10:00
esp32 esp32: Update to latest ESP IDF. 2018-08-14 16:45:37 +10:00
esp8266 esp8266/main: Increase heap by 2kb, now that axtls rodata is in ROM. 2018-09-08 00:09:03 +10:00
minimal minimal/main: Allow to compile without GC enabled. 2018-05-21 13:13:21 +10:00
nrf nrf/uart: Fix UART.writechar() to write just 1 byte. 2018-08-02 22:21:24 +02:00
pic16bit all: Update Makefiles and others to build with new ports/ dir layout. 2017-09-06 14:09:13 +10:00
qemu-arm qemu-arm/test_main: Include setjmp.h because it's used by gc_collect. 2017-12-20 15:42:06 +11:00
stm32 stm32: For MCUs that have PLLSAI allow to set SYSCLK at 2MHz increments. 2018-09-11 16:42:57 +10:00
teensy stm32/pin: In pin AF object, remove union of periph ptr types. 2018-04-11 16:14:58 +10:00
unix unix/Makefile: Build libffi inside $BUILD. 2018-09-10 11:34:46 +03:00
windows windows/msvc: Support custom compiler for header generation. 2018-08-14 15:07:19 +10:00
zephyr zephyr: Rename CONFIG_CONSOLE_PULL to CONFIG_CONSOLE_SUBSYS. 2018-06-27 15:33:59 +10:00