This is for boards without networking support so that the default boot.py
continues to work.
Also update boot.py to use network.country and network.hostname instead.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
This removes the previous WiFi driver from drivers/cyw43 (but leaves behind
the BT driver), and makes the stm32 port (i.e. PYBD and Portenta) use the
new "lib/cyw43-driver" open-source driver already in use by the rp2 port.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Rather than duplicating the implementation of `network`, this allows
ESP8266 to use the shared one in extmod. In particular this gains access
to network.hostname and network.country.
Other than adding these two methods, there is no other user-visible change.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Rather than duplicating the implementation of `network`, this allows ESP32
to use the shared one in extmod. In particular this gains access to
network.hostname and network.country.
Set default hostnames for various ESP32 boards.
Other than adding these two methods and the change to the default hostname,
there is no other user-visible change.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
This provides a standard interface to setting the global networking config
for all interfaces and interface types.
For ports that already use either a static hostname (mimxrt, rp2) they will
now use the configured value. The default is configured by the port
(or optionally the board).
For interfaces that previously supported .config(hostname), this is still
supported but now implemented using the global network.hostname.
Similarly, pyb.country and rp2.country are now deprecated, but the methods
still exist (and forward to network.hostname).
Because ESP32/ESP8266 do not use extmod/modnetwork.c they are not affected
by this commit.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Makefile's support "else ifdef", so use it to make the logic clearer.
Also dedent some associated lines for consistency.
Signed-off-by: Damien George <damien@micropython.org>
This matches the behavior of the makefile ports but implemented for CMake,
making it easy to specify custom board definitions.
This work was funded through GitHub Sponsors.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
This matches the behavior of the makefile ports but implemented for CMake,
making it easy to specify custom board definitions.
This work was funded through GitHub Sponsors.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
This allows:
$ make BOARD_DIR=path/to/board
to infer BOARD=board, rather than the previous behavior that required
additionally setting BOARD explicitly.
Also makes the same change for VARIANT_DIR -> VARIANT on Unix.
This work was funded through GitHub Sponsors.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Signed-off-by: Damien George <damien@micropython.org>
This RNG passes many of the Diehard tests and also the AIS31 test suite.
The RNG is quite slow, delivering 200bytes/s.
Tested on boards with and without a crystal.
It turned out that the result of calling ticks_us() was always either odd
or even, depending on some internal state during boot. So the us-counter
was set to a 2 MHz input and the result shifted by 1. The counting period
is still long enough, since internally a (now) 63 bit value is used for us.
By using the phase jitter between the DFLL48M clock and the FDPLL96M clock.
Even if both use the same reference source, they have a different jitter.
SysTick is driven by FDPLL96M, the us counter by DFLL48M. As a random
source, the us counter is read out on every SysTick and the value is used
to accumulate a simple multiply, add and xor register. According to tests
it creates about 30 bit random bit-flips per second. That mechanism will
pass quite a few RNG tests, has a suitable frequency distribution and
serves better than just the time after boot to seed the PRNG.
Allowing to increase the clock a little bit to 54Mhz. Not much of a gain,
but useful for generating a RNG entropy source from the jitter between
DFLL48M and FDPLL96M.
Remove two SPARKFUN_SAMD51_THINGS_PLUS pin definitions. There were
definitions of TXD and RXD, but these pins do not exist on the board. They
were only shown in the schematics.
Also remove any reference to LED_. This is just a text change, no
functional change.
For compatibility with other ports. Code increase up to ~1250 bytes for
SAMD21. The feature is configurable via MICROPY_PY_MACHINE_PIN_BOARD_CPU
in case flash memory is tight.
This further aligns the features available on Pico and Pico W boards.
os.dupterm is generally useful, but can still be disabled by a board if
needed. hashlib.sha1 requires mbedtls for the implementation, but that's
always available (due to ucryptolib's requirements). The entire hashlib
module can still be disabled by an individual board if needed.
Fixes issue #7881.
Signed-off-by: Damien George <damien@micropython.org>
Before, both uwTick and mp_hal_ticks_ms() were used as clock source. That
assumes, that these two are synchronous and start with the same value,
which may be not the case for all ports. If the lag between uwTick and
mp_hal_ticks_ms() is larger than the timer interval, the timer would either
rush up until the times are synchronous, or not start until uwTick wraps
over.
As suggested by @dpgeorge, MICROPY_SOFT_TIMER_TICKS_MS is now used in
softtimer.c, which has to be defined in a port's mpconfigport.h with
the variable that holds the SysTick counter.
Note that it's not possible to switch everything in softtimer.c to use
mp_hal_ticks_ms() because the logic in SysTick_Handler that schedules
soft_timer_handler() uses (eg on mimxrt) the uwTick variable directly
(named systick_ms there), and mp_hal_ticks_ms() uses a different source
timer. Thus it is made fully configurable.
The default now includes all sub-components (security, l2cap, etc)
and using the kwarg options is no longer supported.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
The default now includes all sub-components (security, l2cap, etc)
and using the kwarg options is no longer supported.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Prior to this commit, on Pico W (where the CYW43 driver is enabled) the PIO
instruction memory was not released on soft reset, so using PIO after a
soft reset would eventually (after a few soft resets) lead to ENOMEM when
allocating a PIO program.
This commit fixes that by tracking the use of PIO memory by this module and
freeing it on soft reset.
Similarly, use of the state machines themselves are tracked and released on
soft reset.
Fixes issue #9003.
Signed-off-by: Damien George <damien@micropython.org>
Make this more generally useful and in line with what the mingw
and unix ports do: 16bit dig size to work on 32bit ports, a
self-contained qstrdefs.preprocessed.h because makemanifest.py
uses that, and a dev variant which effectively puts this to use:
previously the uasyncio module wasn't frozen but instead tests
ran by importing it from the extmod/ directory.
The mpversion.h file must exist before py/ source can be preprocessed,
but this went unnoticed because micropython.vcxproj always calls
MakeVersionHdr before MakeQstrDefs.
The variant.props may have incompatible build options which break
the mpy-cross build and in any case mpy-cross has nothing to do
with variant support.
This is in line with the change made for other ports in d53c3b6a: since
the default output directory already includes the variant name in it
there's no need to add it to the executable as well.
This will ensure that any board with networking support gets:
- webrepl
- mip
- urequests
- ntptime
This work was funded through GitHub Sponsors.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
This drops the `.cpu` directive from the ARM gchelper_*.s files. Having
this directive breaks the linker when targeting older CPUs (e.g. `-mthumb
-mthumb-interwork` for `-mcpu=arm7tdmi`). The actual target CPU should be
determined by the compiler options.
The exact CPU doesn't actually matter, but rather the supported assembly
instruction set. So the files are renamed to *_thumb1.s and *thumb2.s to
indicate the instruction set support instead of the CPU support.
Signed-off-by: David Lechner <david@pybricks.com>
Prior to this commit, Pin(Pin.OPEN_DRAIN, value=0) would not set the
initial value of the open-drain pin to low, instead it would be high.
Signed-off-by: Damien George <damien@micropython.org>
The mp_plat_print output is already being used by the subsequent call to
mp_obj_print_exception(). And this eliminates all references to printf for
this port (at least in non-debug builds).
Signed-off-by: Damien George <damien@micropython.org>
The delay is 1 ms. It avoids the crashes reported by the
issues #8289, #8792 and #9236 with esp-idf versions >= 4.2, but does
not solve an underlying problem in the esp-idf.
The major setting is about the PHY interface configuration. The
configuration matches the Olimex ESP32 Gateway as well.
Tested with esp-idf v4.2.4 and Olimex ESP32 POE boards.
