Commit Graph

7 Commits

Author SHA1 Message Date
MikeTeachman
1f6cb8f047 mixmrt/machine_i2s: Add I2S protocol support.
This commit adds support for machine.I2S on the mimxrt port.  The I2S API
is consistent with the existing stm32, esp32, and rp2 implementations.

I2S features:
- controller transmit and controller receive
- 16-bit and 32-bit sample sizes
- mono and stereo formats
- sampling frequencies from 8kHz to 48kHz
- 3 modes of operation:
  - blocking
  - non-blocking with callback
  - uasyncio
- configurable internal buffer
- optional MCK

Tested with the following development boards:
- MIMXRT1010_EVK, MIMXRT1015_EVK, MIMXRT1020_EVK, MIMXRT1050_EVK
- Teensy 4.0, Teensy 4.1
- Olimex RT1010
- Seeed ARCH MIX

Tested with the following I2S hardware peripherals:
- UDA1334
- GY-SPH0645LM4H
- WM8960 codec on board the MIMXRT boards and separate breakout board
- INMP441
- PCM5102
- SGTL5000 on the Teensy audio shield

Signed-off-by: Mike Teachman <mike.teachman@gmail.com>
2022-03-30 14:12:40 +11:00
robert-hh
5cc50b9f1c mimxrt/machine_spi: Add omitted GPIO config.
The method was changed, but not for the CSx pins.  No functional change.
2022-03-08 23:08:30 +11:00
robert-hh
30380962cf mimxrt: Allow to select cs0 or cs1 for SPI.
Using the keyword argument cs=nnn in the constructor. The cs1
pin has to be defined in mpconfigboard.h.
Note: Only a few boards have the CS1 pin exposed to the connectors.
2022-01-27 16:53:30 +11:00
robert-hh
1dc366f901 mimxrt: Replace Pin-config constants by a function call.
The Pin config setting by IOMUXC_SetPinConfig() is supplied by a
bit pattern. That pattern is specific for a MCU family. In preparation
for supporting the MIMXRT117x family, the constant bit pattern is
replaced by a function call, such that the bit pattern is created
at a single place. The code for this functions was taken from
machine_pin.c.

Note: A working port for the MIMXRT1176 exists already.
2022-01-27 16:53:30 +11:00
robert-hh
b8a0358c34 mimxrt: Compensate for a bug in the fsl_lpspi.c file.
This library file has a bug, in that TransferBlocking returns before the
transfer has finished. That is a problem if a write follows immediately
a read.
2022-01-27 16:53:30 +11:00
robert-hh
2dd3d88409 mimxrt: Support gaps in the SPI an I2C device numbers.
That allows also to use e.g. SPI1 and SPI2 instead SPI0 and SPI1.
2022-01-27 16:53:30 +11:00
robert-hh
f45412793e mimxrt/machine_spi: Add the SPI class to the machine module.
This class supports SPI bus controller mode, with blocking transfers.

SPI device numbers start at 0, to comply with the pinout of the Teensy
boards.  With the configured clock frequency the fastest baud rate is
33MHz.  For messages longer 16 bytes DMA is used.  The class uses the
existing framework with extmod/machine_spi.c.

Extended driver options:

- drive=n with n being between 1 and 6 or PIN.POWER_1 to PIN.POWER_6.
  Since the pins used by the SPI are fixed, no Pin settings can be made.
  Thus the drive option is added allowing to control ringing and crosstalk
  on the connection.

- gap_ns=nnnnn is the time between sent data items in a frame given in ns.
  Default is 2 clock cycles.
2021-06-26 22:14:47 +10:00