Timers now have the following new features:
- can init freq using floating point; eg tim.init(freq=0.1)
- tim.source_freq() added to get freq of timer clock source
- tim.freq() added to get/set freq
- print(tim) now prints freq
Eg pyb.freq(120000000) sets the CPU to 120MHz. The frequency can be set
at any point in the code, and can be changed as many times as you like.
Note that any active timers will need to be reconfigured after a freq
change.
Valid range is 24MHz to 168MHz (but not all freqs are supported). The
code maintains a 48MHz clock for the USB at all times and it's possible
to change the frequency at a USB REPL and keep the REPL alive (well,
most of the time it stays, sometimes it resets the USB for some reason).
Note that USB does not work with pyb.freq of 24MHz.
Teensy doesn't need to worry about overflows since all of
its timers are only 16-bit.
For PWM, the pulse width needs to be able to vary from 0..period+1
(pulse-width == period+1 corresponds to 100% PWM)
I couldn't test the 0xffffffff cases since we can't currently get a
period that big in python. With a prescaler of 0, that corresponds
to a freq of 0.039 (i.e. cycle every 25.56 seconds), and we can't
set that using freq or period.
I also tested both stmhal and teensy with floats disabled, which
required a few other code changes to compile.
Fix stmhal and teensy print routines to report actual prescaler an period.
Fix teensy build to use soft-float
Add USE_ARDUINO_TOOLCHAIN option to teensy build
This allows to set the pulse width (for PWM mode) as a ratio relative to
the period of the timer. Eg, 0.5 is a 50% duty cycle. You can set the
ratio in the channel init, or using channel.pulse_width_ratio; the
latter can also read the pulse width as a ratio.
Blanket wide to all .c and .h files. Some files originating from ST are
difficult to deal with (license wise) so it was left out of those.
Also merged modpyb.h, modos.h, modstm.h and modtime.h in stmhal/.
Simple but functional timer control. More sophistication will
eventually be added, or for now just use direct register access :)
Also added pyb.freq() function to get MCU clock frequencies.
Internal flash used for the filesystem is now written (from the cache)
only after a 5s delay, or when a file is closed, or when the drive is
unmounted from the host. This delay means that multiple writes can
accumulate in the cache, and leads to less writes to the flash, making
it last longer.
It's implemented by a high-priority interrupt that takes care of flash
erase and write, and flushing the cache.
This is still only an interim solution for the flash filesystem. It
eventually needs to be replaced with something that uses less RAM for
the cache, something that can use more of the flash, and something that
does proper wear levelling.
Reads ADC values into a bytearray (or similar) at a fixed rate. Needs a
better name and improved API. Also fix up DAC dma function (which also
needs a better name and API).
