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stm32/i2c: Fix I2C frequency calc so it doesn't exceed requested rate.

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Prior to this commit, the actual I2C frequency can be faster than specified
one and it may exceed the I2C's specification for Fast Mode.  The frequency
of SCL should be less than or equal to 400KHz in Fast Mode.

This commit fixes this issue for F4 MCUs by rounding up the division in the
frequency calculation.
This commit is contained in:
yn386 2022-09-19 10:14:27 +09:00 committed by Damien George
parent 65d82066a8
commit a74e4fabeb
3 changed files with 11 additions and 2 deletions
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4
docs/library/machine.I2C.rst
View File

@ -91,6 +91,10 @@ General Methods
- *sda* is a pin object for the SDA line
- *freq* is the SCL clock rate
In the case of hardware I2C the actual clock frequency may be lower than the
requested frequency. This is dependant on the platform hardware. The actual
rate may be determined by printing the I2C object.
.. method:: I2C.deinit()
Turn off the I2C bus.

4
docs/library/pyb.I2C.rst
View File

@ -96,6 +96,10 @@ Methods
that DMA transfers have more precise timing but currently do not handle bus
errors properly)
The actual clock frequency may be lower than the requested frequency.
This is dependant on the platform hardware. The actual rate may be determined
by printing the I2C object.
.. method:: I2C.is_ready(addr)
Check if an I2C device responds to the given address. Only valid when in controller mode.

5
ports/stm32/i2c.c
View File

@ -70,10 +70,11 @@ int i2c_init(i2c_t *i2c, mp_hal_pin_obj_t scl, mp_hal_pin_obj_t sda, uint32_t fr
// SM: MAX(4, PCLK1 / (F * 2))
// FM, 16:9 duty: 0xc000 | MAX(1, (PCLK1 / (F * (16 + 9))))
// (the PCLK1-1 and +1 at the end is to round the division up)
if (freq <= 100000) {
i2c->CCR = MAX(4, PCLK1 / (freq * 2));
i2c->CCR = MAX(4, ((PCLK1 - 1) / (freq * 2) + 1));
} else {
i2c->CCR = 0xc000 | MAX(1, PCLK1 / (freq * 25));
i2c->CCR = 0xc000 | MAX(1, ((PCLK1 - 1) / (freq * 25) + 1));
}
// SM: 1000ns / (1/PCLK1) + 1 = PCLK1 * 1e-6 + 1